umx

UMX VM implementation (icfpc '06)
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UM-SPEC.TXT (9490B)


      1 
      2   Order for Construction          Standard Sand of Pennsylvania Co.
      3 
      4   Client: Cult of the Bound Variable
      5   Object: UM-32 "Universal Machine"
      6   -----------------------------------------------------------------
      7                                                       21 July 19106
      8 
      9   Physical Specifications.
     10   ------------------------
     11 
     12   The machine shall consist of the following components:
     13 
     14     * An infinite supply of sandstone platters, with room on each
     15       for thirty-two small marks, which we call "bits."
     16 
     17                            least meaningful bit
     18                                               |
     19                                               v
     20               .--------------------------------.
     21               |VUTSRQPONMLKJIHGFEDCBA9876543210|
     22               `--------------------------------'
     23                ^
     24                |
     25                most meaningful bit
     26 
     27               Figure 0. Platters
     28       
     29       Each bit may be the 0 bit or the 1 bit. Using the system of
     30       "unsigned 32-bit numbers" (see patent #4,294,967,295) the
     31       markings on these platters may also denote numbers.
     32 
     33     * Eight distinct general-purpose registers, capable of holding one
     34       platter each.
     35 
     36     * A collection of arrays of platters, each referenced by a distinct
     37       32-bit identifier. One distinguished array is referenced by 0
     38       and stores the "program." This array will be referred to as the
     39       '0' array.
     40 
     41     * A 1x1 character resolution console capable of displaying glyphs
     42       from the "ASCII character set" (see patent #127) and performing
     43       input and output of "unsigned 8-bit characters" (see patent
     44       #255).
     45   
     46 
     47   Behavior.
     48   ---------
     49 
     50   The machine shall be initialized with a '0' array whose contents
     51   shall be read from a "program" scroll. All registers shall be
     52   initialized with platters of value '0'. The execution finger shall
     53   point to the first platter of the '0' array, which has offset zero.
     54 
     55   When reading programs from legacy "unsigned 8-bit character"
     56   scrolls, a series of four bytes A,B,C,D should be interpreted with
     57   'A' as the most magnificent byte, and 'D' as the most shoddy, with
     58   'B' and 'C' considered lovely and mediocre respectively.
     59 
     60   Once initialized, the machine begins its Spin Cycle. In each cycle
     61   of the Universal Machine, an Operator shall be retrieved from the
     62   platter that is indicated by the execution finger. The sections
     63   below describe the operators that may obtain. Before this operator
     64   is discharged, the execution finger shall be advanced to the next
     65   platter, if any.
     66 
     67   Operators.
     68   ----------
     69 
     70   The Universal Machine may produce 14 Operators. The number of the
     71   operator is described by the most meaningful four bits of the
     72   instruction platter.
     73 
     74               .--------------------------------.
     75               |VUTSRQPONMLKJIHGFEDCBA9876543210|
     76               `--------------------------------'
     77                ^^^^
     78                |
     79                operator number
     80 
     81               Figure 1. Operator Description
     82 
     83 
     84   Standard Operators.
     85   -------------------
     86 
     87   Each Standard Operator performs an errand using three registers,
     88   called A, B, and C. Each register is described by a three bit
     89   segment of the instruction platter. The register C is described by
     90   the three least meaningful bits, the register B by the three next
     91   more meaningful than those, and the register A by the three next
     92   more meaningful than those.
     93 
     94                                       A     C
     95                                       |     |
     96                                       vvv   vvv                    
     97               .--------------------------------.
     98               |VUTSRQPONMLKJIHGFEDCBA9876543210|
     99               `--------------------------------'
    100                ^^^^                      ^^^
    101                |                         |
    102                operator number           B
    103 
    104               Figure 2. Standard Operators
    105 
    106 
    107   A description of each basic Operator follows.
    108 
    109   Operator #0. Conditional Move.
    110 
    111                   The register A receives the value in register B,
    112                   unless the register C contains 0.
    113 
    114            #1. Array Index.
    115 
    116                   The register A receives the value stored at offset
    117                   in register C in the array identified by B.
    118 
    119            #2. Array Amendment.
    120 
    121                   The array identified by A is amended at the offset
    122                   in register B to store the value in register C.
    123 
    124            #3. Addition.
    125 
    126                   The register A receives the value in register B plus 
    127                   the value in register C, modulo 2^32.
    128 
    129            #4. Multiplication.
    130 
    131                   The register A receives the value in register B times
    132                   the value in register C, modulo 2^32.
    133 
    134            #5. Division.
    135 
    136                   The register A receives the value in register B
    137                   divided by the value in register C, if any, where
    138                   each quantity is treated treated as an unsigned 32
    139                   bit number.
    140 
    141            #6. Not-And.
    142 
    143                   Each bit in the register A receives the 1 bit if
    144                   either register B or register C has a 0 bit in that
    145                   position.  Otherwise the bit in register A receives
    146                   the 0 bit.
    147 
    148   Other Operators.
    149   ----------------
    150 
    151   The following instructions ignore some or all of the A, B and C
    152   registers.
    153 
    154            #7. Halt.
    155 
    156                   The universal machine stops computation.
    157 
    158            #8. Allocation.
    159 
    160                   A new array is created with a capacity of platters
    161                   commensurate to the value in the register C. This
    162                   new array is initialized entirely with platters
    163                   holding the value 0. A bit pattern not consisting of
    164                   exclusively the 0 bit, and that identifies no other
    165                   active allocated array, is placed in the B register.
    166 
    167            #9. Abandonment.
    168 
    169                   The array identified by the register C is abandoned.
    170                   Future allocations may then reuse that identifier.
    171 
    172           #10. Output.
    173 
    174                   The value in the register C is displayed on the console
    175                   immediately. Only values between and including 0 and 255
    176                   are allowed.
    177 
    178           #11. Input.
    179 
    180                   The universal machine waits for input on the console.
    181                   When input arrives, the register C is loaded with the
    182                   input, which must be between and including 0 and 255.
    183                   If the end of input has been signaled, then the 
    184                   register C is endowed with a uniform value pattern
    185                   where every place is pregnant with the 1 bit.
    186 
    187           #12. Load Program.
    188 
    189                   The array identified by the B register is duplicated
    190                   and the duplicate shall replace the '0' array,
    191                   regardless of size. The execution finger is placed
    192                   to indicate the platter of this array that is
    193                   described by the offset given in C, where the value
    194                   0 denotes the first platter, 1 the second, et
    195                   cetera.
    196 
    197                   The '0' array shall be the most sublime choice for
    198                   loading, and shall be handled with the utmost
    199                   velocity.
    200 
    201   Special Operators.
    202   ------------------
    203 
    204   One special operator does not describe registers in the same way.
    205   Instead the three bits immediately less significant than the four
    206   instruction indicator bits describe a single register A. The
    207   remainder twenty five bits indicate a value, which is loaded
    208   forthwith into the register A.
    209 
    210                    A  
    211                    |  
    212                    vvv
    213               .--------------------------------.
    214               |VUTSRQPONMLKJIHGFEDCBA9876543210|
    215               `--------------------------------'
    216                ^^^^   ^^^^^^^^^^^^^^^^^^^^^^^^^
    217                |      |
    218                |      value
    219                |
    220                operator number
    221 
    222                Figure 3. Special Operators
    223 
    224           #13. Orthography.
    225 
    226                   The value indicated is loaded into the register A
    227                   forthwith.
    228 
    229   Cost-Cutting Measures.
    230   ----------------------
    231 
    232   As per our meeting on 13 Febtober 19106, certain "impossible
    233   behaviors" may be unimplemented in the furnished device. An
    234   exhaustive list of these Exceptions is given below. Our contractual
    235   agreement dictates that the machine may Fail under no other
    236   circumstances.
    237 
    238 
    239   If at the beginning of a cycle, the execution finger does not indicate
    240   a platter that describes a valid instruction, then the machine may Fail.
    241 
    242   If the program decides to index or amend an array that is not
    243   active, because it has not been allocated or it has been abandoned,
    244   or if the offset supplied for the access lies outside the array's
    245   capacity, then the machine may Fail.
    246 
    247   If the program decides to abandon the '0' array, or to abandon an array
    248   that is not active, then the machine may Fail.
    249   
    250   If the program sets out to divide by a value of 0, then the machine
    251   may Fail.
    252 
    253   If the program decides to load a program from an array that is not
    254   active, then the machine may Fail.
    255 
    256   If the program decides to Output a value that is larger than 255, the
    257   machine may Fail.
    258 
    259   If at the beginning of a machine cycle the execution finger aims
    260   outside the capacity of the 0 array, the machine may Fail.